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Section: Freelance programmers and web programmers resumes
Specialization: VHDL, C, Matlab, FPGA
Experience: 2-3 years
Age: 25 years
Sex: Male
Foreign languages: English
Contact info:
First, Last name: Zoran Jaksic
E-mail: zorjak@gmail.com
Full description:
Name: ZORAN JAKЉIĆ
Address: Topaloviceva 2/21 11050 Belgrade, Serbia
Citizenship: Republic Serbia
Tel: +381649049558
E-mail: zorjak@gmail.com
Date of Birth: 27.03.1984.
Sex: Male
EDUCATION: Diploma in Electrical Engineering, December 2006
MSc at University of Belgrade, Department of Signals and Systems, November 2008 - present
Dipl.-Ing. in Electrical Engineering, University of Montenegro, Faculty of Electrical Engineering, Department of Electronics (grade point average 8.73 out of 10)
Courses taken: Digital Signal Processing, Digital System Design, Microcontroller Systems Design, Computer Aid Design
High School, Electrotechnic School “Vaso Aligrudić”, Department of Electronics (average grade 5 out of 5).
AWARDS
Diploma “Luča” 2002 (all highest grades for four years in high school)
FIELDS OF INTEREST:
SoC and systems on PCB, Microprocessors, IC design, Applied Mathematics, Digital Signal Processing
WORK EXPERIENCE
May 2008 – present Institute Mihailo Pupin Belgrade (development engineer)
25th November 2007 - 15th February 2008, University of Patras, Greece, Electrical Engineering Faculty, Applied Electronics Laboratory (APEL).
PERSONAL PROPERTIES
Hard worker, self-motivated person with excellent negotiating capabilities
SKILLS:
Development tools: Matlab, Orcad, ISE, Sysgen, Simplify, Modelsim
Programming language: VHDL, Matlab, C, C++
Other computer skills: MS Office (Word, Excel, Power point, Front page)
Hardware: MC and FPGA design
LANGUAGES:
Native language: Serbian
Foreign Language: English (excellent), French (basic)
REFERENCES:
M. Zogović, G. Blagojević, Ζ. Jakљić, M. Jovanović, R. Stojanović “An example of flexible, FPGA-based median filter“, International Conference, Etran, Belgrade 2006 (student work)
Z. Jakљić, M. Zogović, R. Stojanović, “An approach to realization of FFT using FPGA technology“, International Conference, Etran, Igalo, 2007(student work)
PEC (Power Electronic Controller) – FPGA design of communication protocol between different parts of the system -High speed Serializers, Deserializers, and Receive - Transmit state machines, high speed interfaces (UART, SPI, PWM).
some other FPGA projects taht I was involved:
FPGA realization of Short Time Fourier Transform
LED - LED, FPGA based photopletsimography sensor (using high impedance property of FPGA IO pin for AD conversion)
Different realizations of IIR and FIR filters
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